abs_enc.h

00001 /*
00002   abs_enc.h
00003   
00004   Nicolas Williamson - July 2009
00005 */
00006 
00007 /* HOW TO USE
00008   1) Copy the HARDWARE SETUP code into init_hardware()
00009   2) Call ae_init_encoder(...) from init_software()
00010   4) Copy the INTERRUPT SETUP code into init_interrupts()
00011     - You might have to change the priority.
00012   3) Call ae_update() from the schedule.
00013     - If you need to read the value right away, call ae_wait afterwards
00014       to be sure the update has completed before reading a value
00015   
00016 */
00017 
00018 /* HARDWARE SETUP
00019 
00020   // *******************************************************************************
00021   // SPI0 Setup for Absolute Encoder 
00022   // *******************************************************************************
00023   //Set Pinsel bits for controlling SPI0:
00024   PINSEL0 &= ~(3<<8); //clear pin P0.4
00025   PINSEL0 &= ~(3<<10); //clear pin P0.5 
00026   PINSEL0 &= ~(3<<26); //clear pin P0.5
00027   PINSEL0 |= (1<<8);    //SCKO for SPI0 (clock for data transfer)
00028   PINSEL0 |= (1<<10);     //MISO for SPI0 (master in slave out data)
00029   PINSEL0 |= (0<<26);   //set P0_13 to GPIO -- set pin to output
00030   FIO0DIR |= (1<<13);   //this pin controls multiplexers (SN74LVC1G3157) via the SN74LVC1G07 level shitfer
00031                               //when P0_13 is low J3 encoder can be read via SPI
00032                   //when   ''  is high J9 encoder can be read 
00033   //Set Up SPI Register:
00034   S0SPCR |= (1<<2) | (0<<8) | (1<<9) | (1<<10) | (1<<11);   //recieve 14 bits of data
00035   S0SPCR |= (1<<4);       //set clock polarity to active low
00036   S0SPCR |= (1<<5);       //activate master mode
00037   S0SPCCR = 60; //set data transfer rate; PCLK / S0SPCCR = 60MHz / 60 = 1MHz
00038   
00039 */
00040 
00041 /* INTERRUPT SETUP
00042 
00043   // ************ PRIORITY 10 ******************
00044   //Absolute Encoder
00045   VICVectAddr10 = (unsigned long)ae_isr;
00046   VICVectCntl10 = 0x20 | VIC_SPI0; 
00047   VICIntEnable = 1 << VIC_SPI0;   
00048 
00049 */
00050 
00051 #ifndef __H_ABS_ENC__
00052 #define __H_ABS_ENC__
00053 
00057 typedef enum ae_states{
00058   AE_NOT_DONE = 0, 
00059   AE_DONE = 1 
00060 } AE_STATUS;
00061 
00065 typedef enum ae_encoders{
00066   AE_1 = 0, 
00067   AE_2 = 1, 
00068   AE_LAST
00069 } AE_ID;
00070 
00074 typedef struct ae_encoder{
00075   int read; 
00076   int zero; 
00077   int delta; 
00078   int value; 
00079 } AE_ENCODER;
00080 
00081 //Functions
00082 void ae_init_encoder(AE_ID encoder_id, int zero, int rpm, int cpr);
00083 void ae_update(void);
00084 void ae_read(AE_ID encoder);
00085 int ae_get_pos(AE_ID encoder);
00086 void ae_wait(void); //waits until the current update has completed
00087 void ae_isr(void) __irq;
00088 
00089 #endif
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